Inside the AI Boom: Who Makes the Chips and Who’s Hiring

Part 1/6 (Chips, Servers, Cooling, Power, Design, CoLo)

The parent piece in this series, “The AI Gold Rush: Who’s Selling the Shovels”, mapped the full AI infrastructure stack from chips to fiber to nuclear power. This series goes a layer deeper, one layer per post, and adds the question the parent piece didn’t answer: where are the doors? Recent grads, career-changers, and people outside the industry looking in mostly know NVIDIA, possibly TSMC, and not much else. That is a small slice of a very large hiring market.

This post covers silicon. Five sub-layers — merchant accelerators, HBM memory, foundry, custom-XPU design partners, and advanced packaging — then a careers section that samples current openings at the five most representative employers and buckets them into a fixed taxonomy that will repeat across all six posts. The goal is to show readers, with numbers, that a chip company is not just chip designers.

1. Merchant AI Accelerators — and the Captive Chips They Compete With

The compute layer is no longer a monopoly, but it is still extremely top-heavy. NVIDIA holds roughly 80–90% of the merchant AI accelerator market. AMD is the only credible merchant number-two. Everything else either ships at a fraction of that scale or ships captive — designed by a hyperscaler for its own clouds and never sold on the open market.

The strategic split worth understanding: merchant means anyone can buy them. Captive means only one customer gets them. Both compete for the same wafers, the same HBM stacks, and the same CoWoS slots downstream — which is why the next four sub-layers in this post matter regardless of which accelerator wins.

Player	Type	Latest figure	12–24 mo. trajectory
NVIDIA	Merchant	$75.2B DC rev Q1 FY27 (+92% YoY); ~80–90% accel. share	Blackwell Ultra (GB300) shipping; Vera Rubin in 2027
AMD	Merchant	$5.8B DC rev Q1 2026 (+57%); ~5–7% share	MI400 + Helios rack ramp H2 2026
Intel (Gaudi 3)	Merchant	Sub-1% share; 24× 200GbE ports/chip	Pushed industry to Ethernet; Falcon Shores in flux
Cerebras	Merchant	$510M 2025 rev (+76%); IPO May 2026 (~$5.5B raised)	WSE-4 on roadmap; 750 MW OpenAI capacity deal
Groq	Merchant	$6.9B private valuation; LPU/LPX racks	Agentic-inference focus; on-prem + cloud
Google TPU	Captive	Ironwood (v7) GA April 2026; Anthropic 1M-chip commit	Co-designed w/ Broadcom; +3.5 GW in 2027
AWS Trainium	Captive	Trainium2 GA; Trainium3 designed by Alchip	Project Rainier; >1.5M Trainium chips in 2026
Meta MTIA	Captive	Internal ramp on inference + ranking	MTIA v2/v3 designed for Llama workloads
Microsoft Maia	Captive	Maia 100 deployed; Marvell co-designed Maia 2	Cobalt CPU + Maia stack across Azure
Huawei Ascend	Captive*	~$12B AI-processor rev projected 2026; 600K 910C target	China domestic mandate (~80% local chips)

*Sold inside China only. Long tail worth knowing by name: d-Matrix (inference accelerators), Tenstorrent (RISC-V, Jim Keller), SambaNova (RDU). None at NVIDIA scale, all hiring.

2. HBM Memory — The Toll Collector

Every accelerator listed above ships loaded with High Bandwidth Memory — DRAM stacked vertically and bonded directly to the processor. There are exactly three companies in the world that make it. That is not a metaphor for a tight market; it is the market. The parent piece flagged this as a toll-collector layer, and Micron’s most recent quarter just made the point in sharper terms: revenue quadrupled, gross margin crossed 81%, and the company has $100 billion in minimum-revenue strategic agreements already booked.

Player	Share	Latest revenue	12–24 mo. trajectory
SK Hynix	~55–62% HBM share	Q1 2026 KRW 5.26T rev (+198%); op profit +405%	~2/3 of NVIDIA HBM4 (Rubin) orders; design-eng hiring surge
Samsung	~30–40%, declining	Memory + foundry under $73B 2026 capex plan	Catching up on HBM4 qual; competing for NVIDIA + Broadcom slots
Micron	~10–15%, gaining	Q3 FY26 $41.5B rev (+346%); HBM4 >$1B/qtr	Sold out through 2027; 16 customer agreements ~$100B contracted

The takeaway is unchanged from the parent piece: HBM doesn’t make the headlines, but it collects a toll on every AI thought that gets processed — and now even more of one.

Foundry — The Bottleneck of Bottlenecks

Designing a chip is not the same as building one. The actual wafers come from a foundry, and at the leading edge there are essentially three names — with one of them holding roughly 70% of the market alone.

TSMC reported Q1 2026 revenue of $35.9 billion, up 40.6% year-over-year, with gross margin at 66.2% and HPC at 61% of the mix (up from ~50% a year earlier). Full-year 2026 revenue is guided above 30% growth on $52–56 billion of capex — the largest single-year semiconductor spend ever recorded. Samsung Foundry posted $12.6 billion in 2025 foundry revenue, down 3.9%, and is throwing $73 billion at capex and R&D in 2026 trying to claw share back. Intel Foundry generated $223 million in Q3 2025 — a rounding error — with 18A now ramping for external customers and the first real test of whether Intel can ever be a foundry to anyone but Intel.

Sitting on top of foundry is advanced packaging, which is a foundry problem in practice. TSMC’s CoWoS (Chip-on-Wafer-on-Substrate) line is the single tightest node in the entire AI supply chain. Capacity is climbing from roughly 35,000 wafer starts per month in late 2024 toward 130,000 by end of 2026, and the supply-demand gap is expected to narrow from ~20% to ~10% over the same window. The line is functionally sold out, with NVIDIA reserving slots into 2027.

Player	Share	Latest figure	12–24 mo. trajectory
TSMC	~70% foundry; ~100% leading-edge AI	Q1 2026 $35.9B (+40.6%); 66.2% GM; HPC 61% of mix	FY26 >30% rev growth; CoWoS to 130K wpm; N2 ramps late 2026
Samsung Foundry	~7–10%	$12.6B 2025 (-3.9% YoY); $73B 2026 capex+R&D	SF2 (2nm) in volume; chasing NVIDIA/Tesla/Qualcomm hedge wins
Intel Foundry	<1%	$223M Q3 2025 external rev	18A ramp; first real external customer test through 2026
CoWoS (TSMC)	Bottleneck	~35K → ~130K wpm (late-2024 to end-2026)	Demand-supply gap 20% → ~10% by end-2026

4. Custom-XPU Design Partners — The Names You’ve Never Heard

When Google says “we designed the TPU” or Amazon says “Trainium is our chip,” someone else actually did most of the chip design. That someone is typically Broadcom, Marvell, Alchip, or GUC. The parent piece covered Broadcom as the dominant XPU partner; the field underneath it is worth knowing because that is where most of the design-engineering hiring actually happens.

Broadcom’s AI semiconductor revenue hit $10.8 billion in Q2 FY2026, up 143% YoY, with Q3 guidance of $16 billion (over 200% YoY) and a disclosed $73 billion AI backlog. Hock Tan put the company’s 2027 AI revenue target above $100 billion. Marvell is the other co-design half of the duopoly: roughly $1.5 billion in custom-AI ASIC revenue in 2025, with the company guiding toward as much as $11 billion in 2026, helped by Microsoft Maia and AWS Inferentia. Together Broadcom and Marvell control roughly 95% of the custom AI ASIC co-design market by revenue.

Then the Taiwan layer. Alchip is the AWS Trainium design partner — about 60% of its 2024 revenue came from “Customer A,” widely identified as AWS — and is forecast to roughly triple revenue this year off the Trainium 3-nm ramp. GUC is TSMC’s in-house design service (Taiwan Semiconductor owns the majority), specializing in advanced-node tapeouts. If you wanted to know whose engineers are physically building the chips behind the hyperscaler captives, the answer overwhelmingly sits in San Jose, Boston, and Hsinchu.

Player	Customer concentration	Latest revenue	Trajectory
Broadcom	Google, Meta, OpenAI, Anthropic +	AI rev $10.8B Q2 FY26 (+143%); Q3 guide $16B	$73B AI backlog; >$100B AI rev targeted FY27
Marvell	AWS Trainium/Inferentia, Microsoft Maia	~$1.5B custom AI ASIC 2025	Guided up to ~$11B in 2026; NVIDIA put $2B in
Alchip	AWS (~60% of revenue)	From ~$1B 2024 base; sharp 2026 ramp	Trainium 3-nm wafer pkg volume rising 13×
GUC	TSMC-owned majority; broad TSMC eco	Smaller pure-play design service	Co-rides TSMC node ramps; benefits from CSP ASIC push

5. Advanced Packaging / OSAT — The Hidden Chokepoint After the Wafer

After a wafer leaves the fab, someone has to test the dies, cut them apart, package them, and qualify the package. That work is called OSAT — outsourced semiconductor assembly and test — and three companies do most of it. The whole layer is invisible until it stops working, at which point the entire pipeline upstream stops with it.

ASE Technology of Taiwan leads with about $18.5 billion in 2024 revenue and roughly 45% share among the top ten OSAT firms. Amkor sits second at $6.3 billion and 15.2%, with advanced packaging (flip-chip and wafer-level) accounting for nearly 82% of its 2024 sales. China’s JCET is third at $5 billion and 12%, growing 19.3% year-over-year as Beijing pushes domestic capacity. The global OSAT market is sized at roughly $51 billion in 2026, growing to about $77 billion by 2031 (~8.6% CAGR). Advanced packaging specifically grows from ~$44 billion in 2026 to ~$66 billion by 2033.

Strategic point: the OSAT layer is the only part of the silicon stack where China holds a top-three player. As CoWoS-class capacity ramps, the three of them — plus TSMC’s in-house packaging — sit between every wafer in the world and every working AI server. Amkor’s new Arizona advanced-packaging facility is the U.S. side of that story and just starting to hire at scale.

Player	Share	2024 revenue	Trajectory
ASE Technology	~45% of top-10 OSAT	$18.5B	Capacity expansion, advanced packaging mix shift
Amkor	~15%	$6.3B (-2.8% YoY)	Arizona advanced-pkg fab ramping; auto + AI
JCET (China)	~12%	$5.0B (+19.3% YoY)	Beijing’s domestic substitution mandate
Market	—	OSAT $51B → $77B (2031)	Adv. pkg $44B → $66B (2033); ~8.6% CAGR

The Careers Section: Five Companies, Five Buckets, One Taxonomy

Sample size: roughly the last 30 days of postings on each company’s career portal, cross-referenced against LinkedIn, Indeed, Glassdoor and ZipRecruiter as of mid-June 2026. Counts are directional, not precise — LinkedIn de-duplicates differently than each company’s ATS — and the rolling 30-day window changes daily. Buckets are the same five we’ll use across all six posts in this series.

The five buckets: Engineering (hardware, software, firmware, ML systems, manufacturing/process) · Operations & Supply Chain (procurement, logistics, fab ops, planning) · Finance & Accounting (FP&A, controllership, tax, treasury, audit) · Sales & Business Development (field sales, partner/alliance, solutions engineering) · Corporate (HR, legal, comms, IT, real estate, EA).

NVIDIA — ~5,000+ open globally, ~2,000 in the U.S.

Total headcount around 42,000 as of early 2026, up from 36,000 a year earlier. About 74% of employees sit in R&D — which sounds like a software company until you remember that the remaining ~26% is still ~11,000 people. Compensation roles, FP&A, deal desk, HR business partners, sourcing managers, real-estate program managers — all of them currently hiring.

Bucket	Open reqs (approx.)	Typical entry-level requirements	Example titles
Engineering	1,400+ (the bulk)	BS/MS CS, EE, CompE; CUDA / PyTorch / Verilog / SystemVerilog	ASIC Design Engineer; CUDA Software Engineer NCG; Power Architect NCG
Operations & SC	~150	BS supply chain / IE; SAP, planning, NPI exposure	NPI Program Manager; Component Engineer; Operations Analyst
Finance & Accounting	~200	BS Accounting / Finance; CPA path; SQL / Tableau a plus	Senior Revenue Accountant; FP&A Analyst, DC Platforms; Tax Analyst
Sales & BD	~250	BS technical or MBA; cloud + ML literacy	Solutions Architect NCG; Enterprise Account Manager; DevRel Manager
Corporate	~250 (HR/Legal/IT)	BA/BS varied; HR/IP/Legal/Comms tracks	Compensation Analyst; Counsel — Commercial; Workplace Strategy PM

Surprise: at NVIDIA, the non-engineering tail — finance, BD, HR, legal, real-estate — is now roughly 850 open roles by itself. That is larger than most of the companies in this post combined.

AMD — ~600 open globally, ~275 in Austin alone

AMD’s second-place position in merchant accelerators is being staffed for the MI400/Helios ramp. Austin is the gravitational center; Santa Clara, San Jose, Markham (Ontario), Bangalore, and Hyderabad fill out the rest. Roughly 42 supply-chain openings and 20 procurement roles in the U.S. — those numbers reflect how rapidly AMD is building out non-NVIDIA-native logistics for a product line that didn’t exist at this scale 24 months ago.

Bucket	Open reqs (approx.)	Typical entry-level requirements	Example titles
Engineering	~400	BS/MS EE / CS; ROCm, HIP, RDNA, Vitis HLS; physical design tools	Sr. Silicon Design Engineer; ROCm Compiler Engineer; ML Performance Engineer
Operations & SC	~60	BS/MS Supply Chain; SAP, Kinaxis; NPI	Materials Planner; Strategic Sourcing Mgr (Software); MS Co-Op Supply Chain
Finance & Accounting	~40	BS Accounting / Finance; CPA in process	Sr. Finance Analyst, Data Center; Cost Accountant; Tax Senior
Sales & BD	~50	BS technical or business; OEM / hyperscaler accounts	Field Application Engineer — DC GPU; Partner Solution Architect
Corporate	~50	HR / Legal / Comms / IT tracks	HR Business Partner; Senior Counsel — Privacy; IT Service Lead

Surprise: AMD is now hiring co-op and master’s-intern roles in supply chain at the same volume as in silicon, which is what happens when a company graduates from “sell as many MI300X as we can build” to “stand up rack-scale Helios systems on a deadline.”

TSMC Arizona — ~130 open in Phoenix, most accessible entry points in this entire post

The TSMC AZ campus is the single most interesting careers story in the silicon stack for non-engineers. The N4 line is running, N3 / N2 fabs and an advanced-packaging facility are mid-build, and the campus is hiring across skill levels — from warehouse operator and forklift-licensed logistics technician to procurement buyer, facilities engineer, and process-integration engineer. A high-school diploma plus willingness to do shift work gets you in the door to fab support; a community-college technical AAS gets you a maintenance-technician path; a BS gets you process or yield-engineering tracks.

Bucket	Open reqs (approx.)	Typical entry-level requirements	Example titles
Engineering	~70 (fab + facilities)	BS ChemE / EE / ME / IE; willing on-site 12-hr shifts	Process Integration Engineer; Yield Excellence Engineer; Facilities EE
Operations & SC	~30	HS diploma to BS; forklift cert; SAP / WMS exposure helpful	Warehouse Operator; Logistics & Equipment Parts Tech; Procurement Buyer
Finance & Accounting	~10	BS Accounting / Finance; bilingual EN/ZH valued	Financial Analyst; Cost Accountant; Tax Specialist
Sales & BD	~5	BS technical + customer-facing; account-team support	Customer Account Engineer; Solutions Engineer
Corporate	~15	BA/BS varied; HR Ops, IT, EH&S	HR Operations Specialist; EH&S Engineer; IT Infrastructure Engineer

Surprise: TSMC Arizona is hiring warehouse operators, logistics/parts technicians, and procurement buyers in non-trivial volume — jobs you can be qualified for with a high-school diploma and a forklift license. That is the most accessible entry point into front-line AI infrastructure in the United States right now.

Broadcom — ~590 open in the U.S., ~340 worldwide via Glassdoor de-dup

Broadcom’s public face is the AI custom-silicon business; its hiring footprint is split between San Jose, Fort Collins, and Andover for chip work, and a long tail for VMware and the legacy software business. The chip side skews heavily toward analog mixed-signal, ASIC verification, SerDes, and packaging engineers — the talents that turn a hyperscaler’s napkin spec into a tapeout.

Bucket	Open reqs (approx.)	Typical entry-level requirements	Example titles
Engineering	~400 (chip + software)	BS/MS EE / CS; SystemVerilog, UVM, SerDes, analog mixed-signal	ASIC Verification Engineer; High-Speed Analog Designer; SerDes Engineer
Operations & SC	~50	BS Supply Chain / IE	Operations Program Manager; Sourcing Manager — Packaging
Finance & Accounting	~40	BS Finance / Accounting	Payroll Analyst; FP&A Analyst; Revenue Accounting Manager
Sales & BD	~70	BS technical or business	Account Manager — Hyperscaler; Sales Engineer — Networking
Corporate	~30	HR / Legal / IT	HR Business Partner; Senior Counsel; IT Program Manager

Surprise: Broadcom posts more sales / sales-engineering openings than its public profile implies. The XPU business is a deeply relationship-driven enterprise sale to a small number of hyperscalers — the headcount that supports it is real.

SK Hynix America — ~36 open in the U.S., with a much larger Korea hiring surge underway

SK Hynix’s U.S. footprint is smaller than the other four — the company is Korean-domiciled and the bulk of headcount sits in Icheon and Cheongju. But the U.S. arm is the customer-facing layer for NVIDIA and AMD HBM design-in, and SK Hynix is in the middle of a publicly-reported triple-digit recruitment surge for HBM, SOCAMM, and 3D NAND design engineers globally. The America entity hires Field Application Engineers (HBM), PHY/SI design engineers, FTL/firmware engineers, and SSD platform engineers; the Korean parent does most of the volume hiring.

Bucket	Open reqs (approx.)	Typical entry-level requirements	Example titles
Engineering	~25 (US) / triple-digit KR	BS/MS EE / CS / CompE; PHY, FTL, SI/PI, firmware	Field Application Engineer — HBM; Sr. FTL Engineer; Staff PHY Designer
Operations & SC	~3	BS Supply Chain	Operations Program Manager
Finance & Accounting	~3	BS Finance	Senior Financial Analyst
Sales & BD	~3	BS technical + customer-facing	Strategic Account Manager — Hyperscalers
Corporate	~2	HR / Legal / IT	HR Generalist; IT Systems Analyst

Surprise: the most consequential HBM hiring is not happening in the U.S. at all. Anyone willing to work in Korea — or who already speaks Korean — is looking at the single hottest design-engineering market in the world right now.

Where the Doors Are?

For an engineer with a relevant degree, the highest-volume openings are at NVIDIA and Broadcom — they are also the most competitive. For an engineer willing to relocate to Phoenix or Hsinchu, TSMC is the most accessible top-tier chip employer in the world right now. For someone without an engineering background, TSMC Arizona’s operations and supply-chain layer (warehouse operators, parts technicians, procurement buyers, facilities) is the most accessible front-line job in U.S. AI infrastructure as of mid-2026.

For finance, accounting, and corporate functions, NVIDIA alone has ~700+ open non-engineering roles — the structural undercount is that most people don’t think of NVIDIA as an employer for those tracks. For business-development and partner roles, Broadcom and AMD are the openings that pay attention to enterprise software backgrounds, not just GPU resumes. The next post in this series moves one step downstream — to the rack integrators that turn loose silicon into shipping AI servers — where the people-per-dollar-of-revenue ratio is much higher, and the doors get wider.

Selected Sources

• NVIDIA Q1 FY2027 results (data center $75.2B, +92%)

• AMD Q1 2026 results (data center $5.8B, +57%)

• AMD Helios & MI400 series, CES 2026 disclosures

• Google Ironwood TPU v7 GA and Anthropic 1M-chip commitment

• Cerebras IPO / FY2025 revenue (TechCrunch, May 2026)

• TSMC Q1 2026 results (Investing.com transcript; Macromicro)

• TSMC HPC mix and FY2026 guidance (TSMC IR)

• TrendForce: CoWoS supply-demand gap, June 2026

• SK Hynix Q1 2026 results (CNBC, April 2026)

• SK Hynix HBM share and Rubin orders (Counterpoint Research; TrendForce)

• Micron Q3 FY2026 results (Investing.com; TheStreet; The Next Web, June 2026)

• Micron $100B in strategic customer agreements (Micron IR)

• Samsung Foundry FY2025 revenue + 2026 capex plan (PatentPC; TrendForce)

• Intel Foundry Q3 2025 external revenue (PatentPC)

• Broadcom Q2 FY2026 results: AI $10.8B; Q3 guide $16B (SEC 8-K; CNBC)

• Marvell custom-AI ASIC revenue and outlook (Tom’s Hardware; Tech-Insider)

• Alchip 2024 revenue, AWS Trainium ramp (CommonWealth Magazine; Taipei Times)

• TrendForce: ASE / Amkor / JCET top-10 OSAT rankings (May 2025)

• Amkor advanced packaging mix (Amkor IR; Pestel Analysis)

• OSAT market sizing (Mordor Intelligence; Grand View Research)

• Huawei Ascend production ramp (Bloomberg; SemiAnalysis; Tom’s Hardware)

• NVIDIA headcount (Macrotrends; StockAnalysis)

• TSMC Arizona careers (ZipRecruiter; LinkedIn; careers.tsmc.com)

• AMD careers (LinkedIn; Glassdoor; careers.amd.com)

• Broadcom careers (LinkedIn; Glassdoor; broadcom.com/careers)

• SK Hynix America careers (LinkedIn; Greenhouse; TrendForce hiring-surge report, June 2026)